[Barrelfish-users] Intel SCC latency measurements for MPB operations

Konstantin Zertsekel zertsekel at gmail.com
Wed Mar 2 09:42:53 CET 2011


Werner, thanks for the answer.
Assuming we won't use bypass mode to access the local MPB, is there any
software that tests the latency of accessing the local MPB. Our first-step
goal is to measure the latency in this simple case and see that it is 45
core clock + 8 mesh clock as is stated in the graph or at least could be
measured in clocks, not microseconds.
Can you please relate to this picture: [
https://docs.google.com/drawings/edit?id=1X-U10YjKvFQ22sdsKcNFnpHKVLyhR8_6YhJv6tiySUo&hl=en]?
Did anyone measured latency of those paths?
Thanks again, KostaZ.

On Tue, Mar 1, 2011 at 5:53 PM, Haas, Werner <werner.haas at intel.com> wrote:

>  Konstantin,
>
>
>
> I work at Intel Labs so let me try answering the RCCE-related part: The
> latency table reflects the numbers from looking at the actual hardware, i.e.
> without taking software operation into account. The RCCE round-trip times,
> however, were measured by running an actual application, i.e. they rather
> reflect the efficiency of one particular communication algorithm than
> hardware properties. I do not know the precise number but there are actually
> several MPB accesses involved in passing data via RCCE.
>
>
>
> Please also note that the bypass mode should _*not*_ be used as we have a
> hardware bug which can lead to reading incorrect data. Unfortunately this
> greatly reduces the benefit of using the on-die SRAM vs. off-die DDR3.
>
>
>
> Best regards,
>
> Werner
>
>
>
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