[Barrelfish-users] Intel SCC latency measurements for MPB operations
zertsekel at gmail.com
Wed Mar 2 13:07:16 CET 2011
Prof. Timothy, thanks for the answer.
> I'm not sure what communication stack your graphs are using (whether
> this is bare-metal RCCE, RCCE over Linux TCP, etc.).
As I get it, the test was conducted on RCCE over Linux (this assumption
demands a proof, though...).
> On Barrelfish we require a trap to kernel mode for inter-core messages,
> which in practice dominates the time taken to access the MPB (once
> you're in the kernel, we can transfer a cache line to another core's
> on-time MPB in a hundred clocks or so as Intel advertise).
Did you perform some measurement like RCCE PingPong to ascertain
the overhead of the kernel mode trap and the time of the actual cache line
to another core's on-time MPB?
According to the article from 1996 "A Performance Comparison of UNIX
Operating Systems on the Pentium"
Intel Pentium P54C-100MHz was
used for the measurements, getpid() system calls costs ~2.5 microsecond.
Now, the default tile frequency on SCC is 533MHz (if Router frequency is
800MHz), but the order
of context switch / system call may still dominate the time taken to access
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