[Barrelfish-users] Gem5

Mehdi Amiri kordestany at gmail.com
Thu Feb 4 08:23:36 CET 2016


Hi Simon,

Thank you for your reply, I followed the updated instructions on the wiki
with "CXX=g++-4.4 scons build/ARM/gem5.fast", and I got an error on
m5.internal.serialize.Serializable. It says:

$ make gem5_armv7
....
    class Event(m5.internal.serialize.Serializable):
AttributeError: 'module' object has no attribute 'internal'
make: *** [gem5_armv7] Error 1

Looks like the version 0fea324c832c of gem5 has a known error
http://reviews.gem5.org/r/2003/ and there is a patch for it. I applied the
patch and also I used the default compiler of Ubuntu 14.04 (gcc 4.8.4) by
commenting out the lines 513 and 569 of SConstruct to ignore gcc 4.8
warnings, so this is how the gem5 source looks like:

$ hg diff
diff -r 0fea324c832c SConstruct
--- a/SConstruct Sat Nov 10 17:18:02 2012 -0600
+++ b/SConstruct Thu Feb 04 11:07:40 2016 +0400
@@ -510,7 +510,7 @@
 if main['GCC']:
     main.Append(CCFLAGS=['-pipe'])
     main.Append(CCFLAGS=['-fno-strict-aliasing'])
-    main.Append(CCFLAGS=['-Wall', '-Wno-sign-compare', '-Wundef'])
+    # main.Append(CCFLAGS=['-Wall', '-Wno-sign-compare', '-Wundef'])
     # Read the GCC version to check for versions with bugs
     # Note CCVERSION doesn't work here because it is run with the CC
     # before we override it from the command line
@@ -566,7 +566,7 @@

     main.Append(CCFLAGS=['-pipe'])
     main.Append(CCFLAGS=['-fno-strict-aliasing'])
-    main.Append(CCFLAGS=['-Wall', '-Wno-sign-compare', '-Wundef'])
+    #main.Append(CCFLAGS=['-Wall', '-Wno-sign-compare', '-Wundef'])
     main.Append(CCFLAGS=['-Wno-tautological-compare'])
     main.Append(CCFLAGS=['-Wno-self-assign'])
     # Ruby makes frequent use of extraneous parantheses in the printing
diff -r 0fea324c832c src/python/m5/__init__.py
--- a/src/python/m5/__init__.py Sat Nov 10 17:18:02 2012 -0600
+++ b/src/python/m5/__init__.py Thu Feb 04 11:07:40 2016 +0400
@@ -32,7 +32,7 @@

 try:
     # Try to import something that's generated by swig
-    import internal
+    import internal.core

     # Try to grab something from it in case demandimport is being used
     internal.core.curTick
diff -r 0fea324c832c src/python/m5/internal/__init__.py
--- a/src/python/m5/internal/__init__.py Sat Nov 10 17:18:02 2012 -0600
+++ b/src/python/m5/internal/__init__.py Thu Feb 04 11:07:40 2016 +0400
@@ -26,9 +26,9 @@
 #
 # Authors: Nathan Binkert

-import core
-import debug
-import event
-import stats
-import trace
-from drain import DrainManager, Drainable
+#import core
+#import debug
+#import event
+#import stats
+#import trace
+#from drain import DrainManager, Drainable

-------------------------------
Now I can execute simulation on gem5 and I can connect with telnet although
I get a lot of "warn: Trying to access SPSR in an invalid mode: 31". This
is the output of telnet:

==== m5 slave terminal: Terminal 0 ====
Kernel starting at address 0x82d40000
Barrelfish CPU driver starting on ARMv7 Board id 0x000008e0
The address of paging_map_kernel_section is 0x82d4617c
GIC: 3 interrupt lines detected
gic_init: done
gic_enable_interrupt for id=0x22, offset=0x4, index=0x1
gic_enable_interrupt for id=0x23, offset=0x8, index=0x1
start_free_ram = 0x2d96000
spawn module: armv7/sbin/init
init: invoked as: init 2097152
Spawning memory server (armv7/sbin/mem_serv)...
Spawning monitor (armv7/sbin/monitor)...
monitor: invoked as: armv7/sbin/monitor 7725056
RAM allocator initialised, 396 MB (of 460 MB) available
Spawning ramfsd on core 0
ramfsd.0.0: pre-populating from boot image...
ramfsd.0.0: /armv7/sbin/cpu_arm_gem5 already exists, skipping it
ramfsd.0.0: ready
Spawning skb on core 0
Spawning /armv7/sbin/spawnd on core 0
Spawning /armv7/sbin/startd on core 0
Spawning /armv7/sbin/corectrl on core 0
spawnd.0 up.
startd.0.0: starting app /armv7/sbin/memtest on core 1
skb.0.0: waiting for: spawn.1
SYSFLAGSET_BASE is at 0x1c000000
.. mapped to 0xfea00000
.. using address 0x0xfea10030
Kernel starting at address 0x88701000
Barrelfish CPU driver starting on ARMv7 Board id 0x000008e0
The address of paging_map_kernel_section is 0x8870717c
GIC: 3 interrupt lines detected
gic_init: done
spawn module: armv7/sbin/monitor
monitor: invoked as: armv7/sbin/monitor 0 chanid=0 archid=0
Spawning spawnd on core 1
spawnd.1 up.
spawnd.1.0: spawning /armv7/sbin/memtest on core 1
No bootscript
memtest passed successfully! on core 1

-------------------------------
Can you confirm the barrelfish is working properly?
If yes you may want to add the patch and expected result to the wiki for
other researchers.

Thank you for your help!
 Mahdi


On Tue, Feb 2, 2016 at 9:46 PM Simon Gerber <simon.gerber at inf.ethz.ch>
wrote:

> Hi Mahdi,
>
>
> On 02.02.2016 16:46, Mehdi Amiri wrote:
> > Hi,
> >
> > I think, the instructions at Barrelfish ARM document and the wiki page
> regarding running Barrelfish on gem5, is outdated. Can you please inform,
> which version of gem5 is currently in use in ETH? Meanwhile, what is the
> primary platform for ARM development?
>
> I've updated the instructions on the wiki regarding Barrelfish on ARMv7
> GEM5. Note: I'm currently struggling on how exactly to compile the ancient
> commit of gem5 that we need (without having to update our gem5script) to
> run the image (installing g++-4.4 and running CXX=g++-4.4 scons
> build/ARM/gem5.fast seems promising). I'll update the wiki page once I've
> figured out a working combination.
>
> >
> > Regarding the pandaboard-es, does the panda build work with the latest
> development board (Rev B3)?
>
> All our PandaBoards are PandaBoard-ES Rev B1 and we can't confirm that our
> build works on another HW revision. A quick google search shows that B3 has
> a different DRAM chip, which needs some changes to uboot (afaict) but not
> to OS software itself. As we're booting our boards over USB using
> https://github.com/simu/usbboot-omap4 this change should not affect us.
>
> Hope this helps,
> -- Simon
>
> >
> > Thank you for considering.
> >
> > Mahdi
> >
> >
> > _______________________________________________
> > Barrelfish-users mailing list
> > Barrelfish-users at lists.inf.ethz.ch
> > https://lists.inf.ethz.ch/mailman/listinfo/barrelfish-users
> >
>
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