[Oberon] Active Cells
Douglas G. Danforth
danforth at greenwoodfarm.com
Sun Dec 29 01:32:23 CET 2013
How far away are you from allowing someone like me to actually
build a computer from scratch that implements Project Oberon
(a good web browser would also be needed)?
I'm a software fellow not hardware. Any crude estimate of the hardware
cost for such a project?
On 12/28/2013 3:03 PM, Felix Friedrich wrote:
> Dear all,
> since there is some discussion ongoing on this list regarding
> translation of Oberon to VHDL / Verilog, I would like to point out that
> we at ETH do already since some years now focus on software-hardware
> co-design with a programming model derived from Oberon / Active Oberon
> that we call "Active Cells". We added to the concept of modules and
> (active) objects the concept of so called cells, separate components
> that are mapped to processors in a distributed system on chip on an
> FPGA. Hardware can be built from high level programs "on button push".
> As one of many consequences the notion of an Operating System nearly
> vanishes. No interrupts, no scheduling overhead since there is one
> processor core per task allocated; no shared memory, etc. The Fox Oberon
> compiler tool-chain has been extended in order to support hardware
> generation via Verilog. Off-the shelf commercial tools are used for the
> synthesis part.
> An early paper can be downloaded from
> more recent results can be inferred from the slides of a recent workshop
> Let me please also note that we are working on graphical support for the
> tools and many more interesting things to come. The toolchain is under
> active development at ETH Zurich and Uni Basel. It has proven its
> usefulness also in the commercial setup. It is needless to say that
> Prof. Wirth's work on FPGA processor design, compiler construction,
> language design (etc.) was very influential for this work.
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
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