[Oberon] FPGA Oberon on projectoberon: Verilog instead of VHDL

[Jan Verhoeven]

Frans-Pieter Vonck wrote
> On Verilog:
> ---------------
> "The designers of Verilog wanted a language with syntax similar to the C
> programming language [..]"
>
> Anyone has an idea why Wirth choose Verilog instead of VHDL?

I happened to meet Dennis Ritchey lately and he mentioned about this: 
"Wirth is getting older and wiser..."


-- 
Groetjes

Jan Verhoeven