[Oberon] FPGA Oberon some news and a reply to F.P.

greim greim at schleibinger.com
Sun Mar 2 11:20:16 CET 2014

Some news from my FPGA Oberon board:

Yesterday i was also able to compile the Verilog code from the source to 
the Bit-File. That was a big progress for me.

I really hope that several hundreds will follow up! Also guys who are 
more professional then i am.
I thinks this Project Oberon, or i prefer FPGA Oberon is a real great 
and also NEW system!
If we you are thinking about the success of Arduinio and Rasberry PI 
which are much less innovative, then i am not so pessimistic about the 
future of Oberon.
Maybe the fathers of the project should communicate this to Xilinx or 
maybe Altera . I could imagine that a Oberondinio or a Garnetberry OB 
;-)  would be a realistic thing.

As first small project and proof of concept, i personally like to 
realize a kind of oscilloscope.
This requires:
-  in Verilog: the ADC converter handling and a ring buffer, with some 
trigger mechanism.
- in Oberon: line graphic and a small user interface for showing the 

> Still; compare the readabilty of the code of the rs232 driver written in
> verilog with one written in vhdl
> verilog
> http://www.inf.ethz.ch/personal/wirth/ProjectOberon/SourcesVerilog/RS232R.v
> http://opencores.org/websvn,filedetails?repname=rs232_interface&path=%2Frs232_interface%2Ftrunk%2Fuart.vhd
> Greets and happy coding,
> F.P.
mmm, if VHDL or Verilog in principle is better readable i can't evaluate 
in details. Both languages are hard to understand, at least for me, and 
VHDL for me is still more abstract then Verilog.

One general thing is, that the Verilog code as well as the Oberon code 
of ProjectOberon is "poor of comments" as everybody can see at your RS 
232 examples.
I know that Nicklaus Wirth says: "the code must explain itself", and 
also the book is explaining many things very well, but at some corners, 
some comments would be sometimes very helpful...


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