[Oberon] FPGA Oberon some news and a reply to F.P.
greim at schleibinger.com
Thu Mar 6 09:22:33 CET 2014
Am 02.03.2014 23:11, schrieb Aubrey.McIntosh at Alumni.UTexas.Net:
> The bitcoin miners used Spartan 6 units, and they are being abandoned
> now that ASICs are available. I wonder if these would be useful?
If an FPGA algorithm is working well and you don't like to change
anything in your algorithm anymore, its (in theory) not so difficult to
generate from the Verilog or VHDL code an hard wired ASIC instead of a
ASICs are simply cheaper! The disadvantage is that you have to order at
least 100.000+ or so.
Also an ProjectOberon ASIC would be possible.
But then you would give up at least one degree of freedom.
More information about the Oberon