[Oberon] Oberon System on the FPGA (was Oberon-1 or Oberon-2?)
informujo at aon.at
Fri Oct 31 19:48:21 CET 2014
On 10/31/14 19:23, Richard Hable wrote:
> a good candidate because it has a simple "classic" MIPS instruction
correction: "RISC instruction set"
More information about the Oberon