[Oberon] Parallela Board - quite similar to Felix Friedrichs new design
greim at schleibinger.com
Tue Nov 4 20:05:33 CET 2014
Adapteva is now shipping (via RS components) their first boards.
Its also a Zynq (ARM + FPGA) as frontend, and a very clever 16 processor
risc+fpu processor slave.
The design seems to be a mix of the Parallax Propeller, the old
Transputer and the GreenArray Forth chip.
Each singel risc cpu has its own FPU!
The ARM is used as Linux frontend, the FPGA as bridge to the so called
Some more infos at:
The boards are available from below 100 EUR.
One of the main designers seems to be a former Analog Devices DSP
designers. Ericsson (the guys with ERLANG!) is beneath Carmel one of the
I am writing this posting, because the design ideas are very similar to
the design described by Felix Friedrich. The compiler is unfortunately C
I have got my "Desktop" board last week. I hope i will find some time to
play with it on the WE.
Regarding all the discussions last week about
ProjectOberon <-> Desktop PC (meaning AOS, HTML Browser etc.):
I must point out that the PO (i call it FPGA Oberon) is an embedded
system with a fantastic integrated development environment and user
In the same way a modern PC is a lousy (friendly spoken) embedded
system (100W+, no 24/7/365, no reliable software etc.) with a fantastic
(gaudy?) user interface.
PS: i have already an empty Papilio duo board here. I would like to
avoid the soldering adventure of a Spartan-6, but it seems i can't avoid it.
> Message: 2
> Date: Tue, 4 Nov 2014 11:48:58 +0100
> From: Felix Friedrich <felix.friedrich at inf.ethz.ch>
> Subject: Re: [Oberon] Oberon System on the ?
> To: ETH Oberon and related systems <oberon at lists.inf.ethz.ch>
> Message-ID: <5458AF1A.4080001 at inf.ethz.ch>
> Content-Type: text/plain; charset="ISO-8859-1"; format=flowed
> Dear Wojtek, all,
> yes, I am reading the mailing list and in particular the discussions
> around FPGA / Oberon.
> From 2009 - 2013 we have worked on a Microsoft funded project called
> "Supercomputer in the Pocket". Initial goal was basically educational:
> develop a programming language / programming model together with a
> suitable component on an FPGA to ease parallel or concurrent computing.
> In the course of the project it shifted towards (medical)
> high-performance applications on FPGAs. The work is ongoing and is in
> the process of getting mature.
> And we have reached the goal to run high-performance applications on an
> FPGA. In order to achieve this, our programming model (called "Active
> Cells") foresees on the one hand little general purpose cores (TRMs -
> Tiny Register Machines) and on the other hand specialized computation
> engines. Most important feature is that we provide access to the FPGA
> from a dialect of Oberon consequently in high-level.
> We have A2 (programmed in Active Oberon) running on the Zynq ARM cores
> interacting with a Active Cells System on Chip on the FPGA fabric. We
> have various student projects on that and other hardware and teach the
> students how to go along this road in our System Construction Course.
> A company has developed two products on the base of this programming
> model and is successfully making business with it. Which does, by the
> way, not imply that the development and toolchain is closed. Everything
> implemented at ETH will be available open source.
> We are in the process of writing a good introduction to the programming
> model, the toolchain etc. I will post on this list when and where we
> make it available.
> Best regards
> Felix Friedrich
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> End of Oberon Digest, Vol 126, Issue 4
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