[Oberon] HDMI and SD interfaces

[skulski at pas.rochester.edu]

Hello:

A few remarks from the hardware standpoint:

> SD Cards are quite simple to handle. In principle its a stupid serial
> Flash with a SPI interface.

SPI is the lowest speed interface to SD. The SD standard uses up to four
bit lines. It would be nice to use four data lines instead of just one.
The operation would be faster. IP cores exist for doing so.

>> Is HDMI complex?
[snip
> But in principle its a FIFO, a serializer and a TMDS coder (the most
> complex part).

HDMI output is high speed. I doubt it can run in the low cost quad flat
pack FPGAs because the lead inductance will not permit speeds higher than
about 200 Mbps. You need a BGA package to run at higher bit rates required
by the HDMI. It means that the board assembly will be a bit more expensive
due to the BGA pick-and-place requirements. Board layout must be careful
to provide good signal integrity.

The serializer-deserializer used in HDMI designs need be tailored to the
specific FPGAs. I doubt one can design a generic HDMI serdes that would
run across the chip spectrum. Just to give you an example, it took us
several months to develop a robust receiver of multi-lane LVDS signals
approaching the FPGA limit. It was somewat similar to HDMI, but in
reverse. The bottom line: use the IP which is available and tested, such
as the one available from Hamsterworks. Do not try the "as simple as
possible" approach. Everything seems simple if you stay around 10% of the
max nominal clock rate. Nothing is simple when you approach the hardware
speed limits, which HDMI is doing.

Wojtek