[Oberon] Non Oberon code in Oberon

Srinivas Nayak sinu.nayak2001 at gmail.com
Wed Jan 20 03:14:58 CET 2016


Unifying Oberon with LOLA...

This is very much interesting. I would like to listen more on this.
Which thing hampers the unification?

When I heard of LOLA being converted to Verilog code,
I got an impression that, rather than re-implementing the underlying synthesis mechanism,
we are taking an easier path to convert LOLA to Verilog and taking help of Verilog compiler
to map our interest to hardware. Is my guess correct?

Another guess is that, since we don't have a standard hardware and standard synthesis mechanism yet,
we can't directly map LOLA to synthesis mechanism to hardware. Isn't it?

Otherwise, if NW attempts to unify both LOLA and Oberon to a single language,
world would see how one can rely on a single language to do all the job, hardware making to application programming. But then he has to show us how to implement the synthesis mechanism to realize a hardware,
as he did in showing the making the RISC5 CPU.


With thanks and best regards,

Yours sincerely,
Srinivas Nayak

Home: http://www.mathmeth.com/sn/
Blog: http://srinivas-nayak.blogspot.in/

On 01/20/2016 06:23 AM, skulski at pas.rochester.edu wrote:
>> Since the unit of memory is a byte, how would this help?
>
> The objective is to move logic calculations to hardware, where the unit of
> memory is a bit. This statement requires some elaboration. The "bit" can
> be stored in block memory (which Oberon uses), in distributed memory
> (which it could use) or in a flip-flop, which is outside the Oberon scope.
> The latter is of interest for High Level Synthesis, because flip-flops can
> become connected with gates, muxes, and wires, which collectively comprise
> "logic fabric". A very fast logic function can be built with these
> resources.
>
>> How would you store a one-bit boolean?
>
> In a flip-flop.
>
> It is a vision that used to be a pipe dream, but now it is implemented as
> High Level Synthesis by Xilinx and possibly others. I think that the NW
> vision was merging Oberon and LOLA, but it was too hard at the time. Now
> one could possibly map Oberon functions to the High Level Synthesis
> technology bypassing LOLA. Such a topic is worth a thesis. I am not
> advocating it here to the distributed Oberon crowd. But some academic
> researchers may be in the listening mode, who knows.
>
> Wojtek
>
> ________________________________________
> From: Oberon [oberon-bounces at lists.inf.ethz.ch] on behalf of enso
> [enso at apple2.x10.mx]
> Sent: Tuesday, January 19, 2016 7:15 PM
> To: ETH Oberon and related systems
> Subject: Re: [Oberon] Non Oberon code in Oberon
>
> Since the unit of memory is a byte, how would this help? How would you
> store a one-bit boolean?
>
> On 01/19/2016 03:24 PM, skulski at pas.rochester.edu wrote:
>>> BOOLEAN consumes one byte
>> In the FPGA world you would want BOOL to be one bit. Furthermore, you
>> would want logic expressions to get translated to hardware (that is VHDL
>> or Verilog) and then be compiled to HW modules that would act as
>> coprocessors. Such a translation would be optional of course.
>>
>> It is not a pipedream because Xilinx is doing just that with their High
>> Level Synthesis.
>>
>> I am throwing this in for an eager grad student as a worthy project. I
>> think that NW once had a dream of unifying Oberon with LOLA, but it was
>> too far ahead of its time.
>>
>> Wojtek
>> ________________________________________
>> From: Oberon [oberon-bounces at lists.inf.ethz.ch] on behalf of Douglas G.
>> Danforth [danforth at greenwoodfarm.com]
>> Sent: Tuesday, January 19, 2016 5:48 PM
>> To: ETH Oberon and related systems
>> Subject: Re: [Oberon] Non Oberon code in Oberon
>>
>> On 1/19/2016 12:41 PM, Lars O wrote:
>>>     Wait, there's BOOLEAN? hmm..
>> Yes, but BOOLEAN consumes one byte.
>
>
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon
>


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