[Oberon] FPGA Oberon - Reset Button

[thomas.kral at email.cz]

Hi Paul,



Thank you, now I can see btn[3] `sticking out' in the code.




Given the information here, I have had a second thought about the reset, 
perhaps command abort is more useful after all, the means to step out from 
an endless loop. (I remember from a distant past, Macintosh had Apple+.(dot)
key abort sequence)




Reset can always be triggered by cycling the power over USB connector.




I may try to install a microswitch over pin header btn3 and  3.3V, for a 
start.




My next exercise then might be to modify verilog source to tie btn3 to the 
onboard push button, I am examining Icarus capabilities at the moment. To 
understand verilog will be a long process, I can see.




Paul, my another challenge is to implement your network time client, I have 
read your papers you lectured at ETH. But seems too shorthand for me at the 
moment, to understand fully.




I may be also getting nordic module, that is required I believe for this. It
would be nice to have ticking clock, and see real time stamps on files :-)  




Many thanks so far.

Tomas






---------- Původní zpráva ----------
Od: Paul Reed <paulreed at paddedcell.com>
Komu: ETH Oberon and related systems <oberon at lists.inf.ethz.ch>
Datum: 22. 3. 2017 20:43:42
Předmět: Re: [Oberon] FPGA Oberon - Reset Button

"Hi Tomas, 

> I wish to install reset switch, which pin header / button is the reset? 
... 
> Connector J8 
> 
> 5V GND GPIO0 GPIO1 GPIO2 GPIO3 GPIO4 GPIO5 GPIO6 GPIO7 
> 
> 3.3V GND BTN0 BTN1 BTN2 BTN3 N/C N/C N/C N/C 

On the Spartan 3 board btn3 is marked "User Reset" but since you have (I 
believe) a Pepino you wouldn't necessarily know that. :) 

The relevant line in Prof. Wirth's Verilog is in RISC5Top.v, near the 
bottom: 

... 
always @(posedge clk) 
begin 
rst <= ((cnt1[4:0] == 0) & limit) ? ~btn[3] : rst; 
... 

Note that this reset merely aborts the current Oberon command and returns 
to the main loop, like the Interrupt key on the Ceres. 

There isn't an I/O signal which does a cold reset of the Oberon system in 
the way a PC reset button works, since the Spartan 3 board has a 
pushbutton called "Prog" which reloads the FPGA configuration (forcing a 
complete cold start of the hardware). 

>From the Pepino schematic it looks like Magnus has the Spartan 6 FPGA PROG 
pin just pulled high (signal PROGRAM_B) by resistor R32. You could try 
grounding the other side of the resistor to get the same effect as the 
PROG button - but take care not to destroy your board obviously! 

There is a pushbutton on the Pepino, marked "BUTTON" on the schematic, but 
you'd have to change the Verilog and reprogram the board if you wanted to 
use that as btn3. 

HTH 
Paul 


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Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems 
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