[Oberon] FPGA - Boot over serial line

[Magnus Karlsson]

Tomas,

The simplest way for you would be to just re-synthesize the design using 
your new prom.mem and then flash that bit file.

Yes, what you are asking for is possible using the Xilinx tool 
Data2Mem.  It will allow you to take an existing bit file, replace the 
content of one or more of the BRAM (block RAM) units in the bit file 
with new content, and then write out the new bit file that can then be 
written to flash using fpgaprog.  In our case the prom.mem data is 
stored in one of the 32 block rams available in the Spartan6 LX9 so you 
would need to find out which one the synthesis toll decided to use for 
this purpose.  The Data2Mem tool needs this information in a special 
file called .bmm that will also specify how the memory is organized (in 
our case it's organized as 32 bits x 512 words).

The bottom line is that this is possible and is commonly done in 
embedded designs where the main program is frequently replaced, but in 
our case it's more trouble than it's worth in my opinion since it's so 
quick and easy to just re-synthesize.  For more info about Data2Mem see 
https://www.xilinx.com/Attachment/Xilinx_Answer_46945_Data2Mem_Usage_and_Debugging_Guide.pdf

Magnus

On 10/13/2017 7:46 AM, Tomas Kral wrote:
> On Fri, 13 Oct 2017 16:40:24 +0200
> Jörg <joerg.straube at iaeth.ch> wrote:
>
>> ORTool.DecObj
> Thank you.
>
> Now, how can I transfer new `prom.mem' to FPGA flash, without need of
> full new synthesis?
>
> I use `fpgaprog' giving this options.
>
> Usage:fpgaprog [-v] [-j] [-f <bitfile>] [-b <bitfile>] [-s e|v|p|a]
> [-c] [-C] [-r] [-A <addr>:<binfile>] -h			print
> this help -v			verbose output
>     -j			Detect JTAG chain, nothing else
>     -d			FTDI device name
>     -f <bitfile>		Main bit file
>     -b <bitfile>		bscan_spi bit file (enables spi access
> via JTAG) -s [e|v|p|a]		SPI Flash options: e=Erase Only,
> v=Verify Only, p=Program Only or a=ALL (Default)
>     -c			Display current status of FPGA
>     -C			Display STAT Register of FPGA
>     -r			Trigger a reconfiguration of FPGA
>     -a <addr>:<binfile>	Append binary file at addr (in hex)
>     -A <addr>:<binfile>	Append binary file at addr, bit reversed
>