[Oberon] FPGA - Memory Map
thomas.kral at email.cz
Wed Dec 13 13:01:22 CET 2017
On Wed, 13 Dec 2017 12:40:54 +0100
Jörg <joerg.straube at iaeth.ch> wrote:
> - Use 4 different shift registers; one for each plane.
> - Put the 4 LSBs of those registers to the VGA register for the
> - Shift all 4 registers by one bit
> - If the registers are empty, fill them from memory: each register
> from a different plane.
> That’s the theory. In practice, you will have to take care of the
> proper timing!!
Yes, clever thought. Of timing I just became aware thanks to Paul
post, especially when seeing, some vertical/horizontal sync count
equations in `VID.v'. Looks, as if we were chasing electron beam on CRT
When talking on theoretical ground, it already sounded here in the list, that one of the drawbacks of 1-bit stack planes, they do require
upto 4 memory accesses, I was therefore thinking of a special RISC
instruction that would aid stack bit planes graphics manipulation, i.e.
is it possible to copy 4 memory distinct locations in paralell with
increment (something like loop unroll), I hope not being too silly?
Tomas Kral <thomas.kral at email.cz>
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