[Oberon] NAstrobe for RISC5 on Pepino
chris at cfbsoftware.com
Thu Aug 2 14:56:01 CEST 2018
> -----Original Message-----
> From: Oberon [mailto:oberon-bounces at lists.inf.ethz.ch] On Behalf Of
> Skulski, Wojciech
> Sent: Thursday, 2 August 2018 9:58 PM
> To: ETH Oberon and related systems
> Subject: Re: [Oberon] NAstrobe for RISC5 on Pepino
> >> You had also once reported to have implemented New(addr,
> >> size) allocator. Is it also part within that 10% of your compiler
> >> extension?
> >No. 'addr'? That is something I would NOT encourage.
> could you please remind me how I can handle the following
> situation. On the RiskFive board I used the Ethernet chip type Wiznet
> W5300. It is a memory-mapped peripheral, which works like ASRAM. In
> other words, a piece of memory. I could handle it like this:
> WizMemArrayPtr := New (W5300_address, W5300_size);
> where W5300_address is hardwired in the FPGA decoder, and W5300_size
> is a constant from the W5300 data sheet.
> It would be a very clean and natural programming. But it is not
> supported. What are the alternatives? I guess SYSTEM. But why? The
> line of code above is nice, clear, and clean.
Read Chapter 8 'Storage Layout and management', particularly the references
to dynamic memory / the heap, in the Project Oberon book for the reasons why
this is not supported.
Also read Chapter 9 'Device drivers' to see how similar programming tasks
are handled in the Project Oberon operating system. All of the source code
is available to refer to as real-life examples once you have grasped the
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