[Oberon] Bit manipulation in Oberon-07

Chris Burrows chris at cfbsoftware.com
Sat Oct 27 04:34:26 CEST 2018

> -----Original Message-----
> From: Oberon [mailto:oberon-bounces at lists.inf.ethz.ch] On Behalf Of
> Skulski, Wojciech
> Sent: Thursday, 25 October 2018 2:29 AM
> To: ETH Oberon and related systems
> Subject: Re: [Oberon] Bit manipulation in Oberon-07
> The goal is to manipulate bits in hardware. So they do not want to
> "correct for endianness". They need to take the words "as is" and
> access bits according to their positions within the word.

We have implemented two SYSTEM functions in the Astrobe for ARM Cortex-M
compilers which use the ARM bitfield instructions BFI (Bitfield insert) and
UBFX (Unsigned bitfield extract). These are very convenient to use when
accessing arbitrary groups of bits that represent a positive integer buried
in the middle of a 32-bit word. Here are some examples:


e.g. Extracting a 4-bit bitfield from bit positions [7:3] of a word

VAR word, bitfield: INTEGER;

  word := 0ABCDEF75H;
  SYSTEM.UBFX(bitfield, word, 7, 3);

The resulting value of bitfield is 07H;

e.g. Inserting an eight-bit bitfield into a word at bit positions [27:20]:

  word := 0AAADEF75H;
  bitfield := 0BCH;
  SYSTEM.BFI(word, 27, 20, bitfield);  

The resulting value of word is 0ABCDEF75H.

e.g. Just to show the bitfield length and bits do not have to be multiples
of 8 or 4 etc. - extracting a ten-bit bitfield from a word at bit positions

  word := 0ABCDEF75H;
  SYSTEM.UBFX(bitfield, word, 22, 13);  

The resulting value of bitfield is 026FH;


For now you can do the same sort of thing in Oberon for RISC5 (albeit not
quite as efficiently) with these two helper functions:

PROCEDURE BFI*(VAR word: INTEGER; msb, lsb, bitfield: INTEGER);
  word := ORD(SYSTEM.VAL(SET, word) * (-{lsb..msb})) + LSL(bitfield, lsb)

PROCEDURE UBFX*(VAR bitfield: INTEGER; word, msb, lsb: INTEGER);
  bitfield := ROR(ORD(SYSTEM.VAL(SET, word) * {lsb..msb}), lsb);


We're considering implementing these in a future release of the Astrobe
RISC5 compiler as built-in SYSTEM functions for efficiency reasons. If the
bit positions are defined as constants as they are in the ARM instruction
set, each function generates just five RISC5 instructions.

Ultimately, a bitfield capability built in to the language (similarly to
Verilog) could be useful. Maybe so we could write statements like:

  bitfield := word[22:13];

  word[22:13] := bitfield;

Chris Burrows
CFB Software

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