[Oberon] Oberon-2 compiler for FPGA Oberon

Jörg Straube joerg.straube at iaeth.ch
Sun Nov 4 13:38:12 CET 2018


As you can read here, NW started with BRAM as well before using SRAM😊

RISC-0 Harvard, BRAM, word access only
RISC-1 Harvard, SRAM, word, 35 MHz
RISC-2 vonNeumann,SRAM, word, 25 MHz
RISC-3 add byte access + interrupts
RISC-4 add HD (SD card)
RISC-5 add VGA, mouse, keyb, ntw via SPI


> Am 03.11.2018 um 18:20 schrieb Skulski, Wojciech <skulski at pas.rochester.edu>:
> Andreas:
>> But I will provide soon an Oberon-2 compiler for FPGA Oberon which WILL fit in FPGA Oberon.
> thank you for the heads up. Vedant is now working on the RiskFive board hardware. He tested the video, SPI, and Wiznet W5500. (Joerg is also working on W5500 independent of our project.) On Friday he started testing the mouse and keyboard. I think that the board can ship in about a month, after we put together the first draft of the the RISC5 firmware using the RAM and outputting black and white video. We already have Astrobe, but is working from the internal on chip BRAM while ignoring the off chip RAM.
> So we too are moving forward!
> Thank you,
> Wojtek
> --
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