[Oberon] Oberon 2 on RISC5

Andreas Pirklbauer andreas_pirklbauer at yahoo.com
Wed Nov 7 14:06:05 CET 2018

   > While I certainly can understand that the OP2 compiler would struggle
   > with RISC5 on FPGA due to memory limitations in the hardware, I think
   > we may be missing an important segment of application if we focus on an
   > OP2 compiler that is _intended_ to run on a RISC5 FPGA hardware target. 

The planned Oberon-2 compiler for RISC5 in FPGA will NOT be based on
the OP2 compiler, but will be a direct extension of the existing Oberon-07
compiler for RISC5 on FPGA, as published on www.projectoberon.com.

One reason for that decision is that OP2 - being a multi-pass compiler -
builds an intermediate representation which simply would not fit in the
~400KB of heap space available on the FPGA Oberon 2013 system.

Another reason is the desire to make the Oberon-2 compiler implement
a superset of Revised Oberon (Oberon-07) - not the original Oberon
language as defined in the 1988/1990.

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