[Oberon] PO2013 - Real time measurement
thomas.kral at email.cz
Thu Mar 28 11:38:05 CET 2019
On Mon, 25 Mar 2019 21:23:01 +0000
Paul Reed <paulreed at paddedcell.com> wrote:
> Certainly not the circuit you attached in your mail.
True, I picked the other picture. I am now scratching my head over High
vs Low voltage PIC programming (default on newer PICs), reading info
in the specs and on net.
Looking at a simplified PIC prog by NW, it feeds signals from
std PC parallel port at 0..5V.
Exception `MCLR' pin, which is driven 0/5/12V, not sure this is also
applicable to newer PICs. Also not clear how to make 12V out of 5V.
Low voltage may support programming in VDD operating range i.e. 2.0 to
5.5V (PIC16F8x), and requires `RB3' be pulled down by a resistor to GND.
So one more wire in addition to High voltage mode.
Exception seems `MCLR' to do bulk erase, VDD of 4.5V to 5.5V is
I can now see your point, that with a slight modification of NW original
code for PC parallel port, PIC can now be programmed through FPGA GPIO
at 3.5V signal levels.
Being rather H/W numb, cannot figure out recommended wiring, I found
this on the net, with 5V to be 3.5V for FPGA, which may be close?
Then `ICSP' (in-circuit-ser-prog), possibly also requires a suitable
connector+plug, to isolate prog mode to normal operation mode. At the expense of
`RB3' that has a dedicated function.
Tomas Kral <thomas.kral at email.cz>
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