[Oberon] Cheap chinese FPGA board - is it usable for PO?

Skulski, Wojciech skulski at pas.rochester.edu
Mon Nov 11 18:00:40 CET 2019

> Indeed cache would help. Feel free to added it to RISC5Top.v (

I would if I knew how. This is a bit beyond my skill level, even after reading all NW papers from his website.

I do not even know whether or not adding a cache would affect the compiler. Can the compiler stay the same with and without the cache?


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