[Oberon] XGA frequency in FPGA Oberon

D EMARD vordah at gmail.com
Wed Dec 18 10:19:44 CET 2019


On ULX3S we are running it 75 MHz and 5x clock for DVI serializer shifter is
375 MHz. FPGA official top limit is 400 MHz and it works...



On 12/18/19, Joerg <joerg.straube at iaeth.ch> wrote:
> Hi Wojtek
>
> As you can see here: http://tinyvga.com/vga-timing there are different
> possible timings per given resolution.
> If you go higher you flicker less but steal more memory bandwidth available
> to the RISC5 CPU. If you go lower you flicker more but leave more memory
> bandwidth to the CPU.
>
> As the CPU frequency is 25 MHz, generating 75 MHz pixelclock is much easier.
> But with the FPGA clock generator it‘s easily possible to generate 65 MHz
> (multiply 25 MHz by 13 divide by 5)
>
> For my color display, I chose the following timing:
> http://tinyvga.com/vga-timing/800x600@60Hz
> with 40 MHz pixelclock. I could have chosen even a pixelclock of 36 MHz...
>
> br
> Jörg
>
>> Am 18.12.2019 um 04:41 schrieb Skulski, Wojciech
>> <skulski at pas.rochester.edu>:
>>
>> Magnus:
>>
>>  thank you. This was very helpful. I did not realize that XGA is different
>> from VESA.  The numbers in VID.v look more like XGA than VESA. So it is an
>> XGA display with VESA frequency. The difference is minor, though. The
>> monitors are somehow capable of absorbing the discrepancy, which affects
>> only the horizontal scan. The vertical scan is the same for both VESA and
>> XGA. The number on the left are for VESA.
>>
>> //Back porch   144   (160 pixels for XGA @ 60 Hz)
>> //Whole line  1328   (1344 pixels for XGA @ 60 Hz)
>>
>> Thank you,
>> Wojtek
>>
>>
>>
>> ________________________________________
>> From: Oberon [oberon-bounces at lists.inf.ethz.ch] on behalf of Magnus
>> Karlsson [magnus at saanlima.com]
>> Sent: Tuesday, December 17, 2019 7:53 PM
>> To: oberon at lists.inf.ethz.ch
>> Subject: Re: [Oberon] XGA frequency in FPGA Oberon
>>
>> See tinyvga.com/vga-timing/1024x768 at 70Hz
>>
>> My guess is that with 25 MHz CPU clock it's a lot easier to generate 75
>> MHz than 65 MHz.
>>
>> Magnus
>>
>>> On 12/17/2019 4:31 PM, Skulski, Wojciech wrote:
>>> All:
>>>
>>> we have been playing with the FPGA Oberon firmware and we are puzzled
>>> with the peculiar 75 MHz frequency driving the display in Pepino. It
>>> actually works with the monitor which we have. People are saying on the
>>> web that XGA clock is 65 MHz. See tinyvga.com/vga-timing/1024x768 at 60Hz
>>>
>>> NW in his PO.Computer says on page 19 that the frequency should be 56
>>> MHz, rounded up to 60 MHz. So all these numbers are different, 56, 60,
>>> 65, and 75 MHz. Does anyone know why? And which one is right?
>>>
>>> Thank you,
>>> Wojtek
>> --
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>> https://lists.inf.ethz.ch/mailman/listinfo/oberon
>


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