[Oberon] [slightly off-topic] Produce your own physical chips. For free. In the Open.

Jörg joerg.straube at iaeth.ch
Mon Jul 6 08:33:14 CEST 2020


As the RISC-5 has no high demands, I could imagine that 130 nm is good enough. (Pentium III and Pentium 4 Northwood used this technology as well 18 years ago)

I wonder what the benefits of an own RISC-5 ASIC at 130 nm process is compared to a RISC-5 based on a Spartan-6 FPGA at 45 nm.
The newer Xilinx FPGAs use even smaller tech nodes: Artix-7 (28 nm), Virtex (16 nm)

Jörg

> Am 05.07.2020 um 15:23 schrieb Michael Schierl <schierlm at gmx.de>:
> 
> Hello,
> 
> 
> perhaps some of the hardware guys on this list find this interesting (if
> they do not already know):
> 
> https://fossi-foundation.org/2020/06/30/skywater-pdk
> 
> 
> TL;DR: Google sponsors around 40 projects to build their own 130nm ASIC.
> The projects need to be open source / open hardware and use their
> open-source PDK.
> 
> 
> Regards,
> 
> 
> Michael
> 
> 
> PS: I'm not affiliated, just found this interesting as well.
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon



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