[Oberon] RISC5 Project Oberon on Digilent's NexysA7
chris at cfbsoftware.com
Sun Dec 27 12:59:18 CET 2020
> -----Original Message-----
> From: Skulski, Wojciech [mailto:skulski at pas.rochester.edu]
> Sent: Thursday, 24 December 2020 3:09 PM
> To: chris at cfbsoftware.com; ETH Oberon and related systems
> Subject: RE: [EXT] [Oberon] RISC5 Project Oberon on Digilent's
>> From: Chris Burrows [mailto:chris at cfbsoftware.com]
>> Sent: Monday, 7 December 2020 3:09 PM
>> I have now similarly ported RISC5 Project Oberon to Digilent's
>> Nexys A7-100T FPGA Trainer board:
>> I'm getting some timeout issues when uploading files via the
>> onboard SD card socket that I don't get with the Pmod SD card
> The SD socket is connected to both the PIC micro and the FPGA.
> Perhaps there is some issue here, like additional loading of the SD
> signals by the PIC?
Thank you for the tip. It turned out that SD_RESET has to be held LOW. It
actually says this in the Reference Manual:
"Once control over the SD bus is passed from the microcontroller to the
FPGA, the SD_RESET signal needs to be actively driven low by the FPGA to
power the microSD card slot."
As I was able to read from the microSD card I assumed that it had already
been done. Duh!
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