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--></style></head><body lang=DE-CH link="#0563C1" vlink="#954F72"><div class=WordSection1><p class=MsoPlainText><span lang=DE>All<o:p></o:p></span></p><p class=MsoPlainText><span lang=DE><o:p> </o:p></span></p><p class=MsoPlainText><span lang=EN-US>Sorry, I made a typo. The correct identification code should look like this:<o:p></o:p></span></p><p class=MsoPlainText><span lang=DE><o:p> </o:p></span></p><p class=MsoPlainText><span lang=EN-US> cpu := SYSTEM.H(2019) MOD <b><span style='color:red'>100H</span></b>;<o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US> IF cpu = 53H THEN (* RISC5: with interrupts + floating-point, 31.8.2018 *)<o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US> ELSIF cpu = 54H THEN (* RISC5a: no interrupts, no floating-point, 1.9.2018*)<o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US> ELSIF cpu = <b><span style='color:red'>0A0H</span></b> THEN (* RISC0, 26.12.2013 *)<o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US> </span><span lang=DE>END ;<o:p></o:p></span></p><p class=MsoPlainText><span lang=DE> <o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US style='color:black'>First of all, the CPU version identification is an undocumented feature. So only NW knows, if it will be supported in the future.<o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US style='color:black'>Perhaps we as Oberon community can agree on how <b>emulators</b> shall identify itself. I see four thinkable ways<o:p></o:p></span></p><ol style='margin-top:0cm' start=1 type=a><li class=MsoPlainText style='color:black;mso-list:l0 level1 lfo1'><span lang=EN-US>Return one of the values above, as the real FPGA HW would do. Be totally transparent to the Oberon code.<o:p></o:p></span></li><li class=MsoPlainText style='color:black;mso-list:l0 level1 lfo1'><span lang=EN-US>Return another value, so the Oberon code might find out that it’s running on an emulator if he wants to do so<o:p></o:p></span></li><li class=MsoPlainText style='color:black;mso-list:l0 level1 lfo1'><span lang=EN-US>Use a few of the 20 unused bits in the instruction, currently set to 0. This has the benefit that the CPU version is still one of the defined ones, and we can detect the CPU feature set foreseen by NW. We still have the possibility to detect on what emulator this CPU is implemented.<o:p></o:p></span></li><li class=MsoPlainText style='color:black;mso-list:l0 level1 lfo1'><span lang=EN-US>Define a new (still unused) instruction to just return the emulator version.<o:p></o:p></span></li></ol><p class=MsoPlainText><span lang=EN-US style='color:black'><o:p> </o:p></span></p><p class=MsoPlainText><span lang=EN-US style='color:black'>My recommendation would be: c). Just as an idea: use the second lowest byte to identify the emulator.<o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US style='color:black'>As example: SYSTEM.H(2019) DIV 100H MOD 100H would identify the emulator.<o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US><o:p> </o:p></span></p><p class=MsoPlainText><span lang=EN-US>br<o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US>Jörg<o:p></o:p></span></p><p class=MsoPlainText><span lang=EN-US><o:p> </o:p></span></p></div></body></html>