[Barrelfish-users] Barrelfish running on Bochs emulator

Timothy Roscoe troscoe at inf.ethz.ch
Thu Feb 2 11:19:46 CET 2012

Many thanks!   And only one line...

It is interesting that hypervisors and emulators seem to catch errors 
that real hardware silently ignores.   The Microsoft folks had Hyper-V 
throw up a set of similar issues in the past.

We'll put this in the next release.

  -- Mothy

On 02/01/2012 08:38 PM, Zeus Gómez Marmolejo wrote:
> Hi all,
> I've successfully booted Barrelfish on Bochs PC emulator with 1, 2 and 4
> cores SMP emulation.
> I had to do a fix in the Barrelfish code, regarding the IOAPIC index
> register. According to the Intel datasheet, the IOAPIC (
> http://www.intel.com/design/chipsets/datashts/290566.htm ) index
> register has to be accessed only in 32-bit words (page 8). The Bochs
> code has an assert preventing 8-bit access to the register. So the line
> to be modified is in the file devices/lpc_ioapic.dev:
> register ind rw addr(base, 0x0) "Index" type(uint32);
> I send the patch. It seems to work in QEMU and in a real machine too.
> Being able to run Barrelfish inside Bochs has several advantages.
> 1. Its execution is deterministic so if you find an error you can always
> reproduce it in each execution in the same way. QEMU is indeterministic.
> I was even discussing this in the QEMU mailing list and there is
> currently no solution to this problem.
> 2. It has an embedded debugger and you can do physical address
> debugging, the gdb stub in QEMU doesn't support.
> Cheers,
> --
> Zeus Gómez Marmolejo
> Barcelona Supercomputing Center
> PhD student
> http://www.bsc.es
> _______________________________________________
> Barrelfish-users mailing list
> Barrelfish-users at lists.inf.ethz.ch
> https://lists.inf.ethz.ch/mailman/listinfo/barrelfish-users

More information about the Barrelfish-users mailing list