[Barrelfish-users] problem in arm context switching

[Wang Nan]

Hi,

The problematic code is in ./kernel/arch/arm/exec.c, which is generic arm code, not only armv5.

I research on your omap code (boot.S) and find that you setup the mode to ARM_MODE_PRIV (0x0f). Which, in arm manual, is invalid.

Linux run under SVC mode, so I'll switch it to SVC mode. I hope I can provide a patch on it.

Thank you,

于 2013/7/14 7:42, Simon Peter 写道:
> Hi,
> 
> While conducting the XScale port a few years ago, I remember discovering that the original Barrelfish ARM code (which was written for the QEMU-simulated ARMv5) executed in system mode, instead of
> protected mode. This went undiscovered due to the QEMU emulation, which was not impacted by this error.
> 
> I fixed it for the XScale port and the successive ARMv7 port. The original ARMv5 version was left unmodified. In case you are basing your code on that version, you might have run into this problem.
> 
>  -- Simon
> 
> On 13-07-12 05:08 AM, Wang Nan wrote:
>> Hi,
>>
>> CPU driver does context switching at do_resume(), it saves user mode's cpsr to spsr, then use
>>
>> "ldmia  %[regs], {r0-r15}^"
>>
>> to restore cpsr and all registers.
>>
>> However, the code is executed in SYSTEM mode, and SYSTEM mode does't have spsr.
>>
>> According to arm manual, do "ldmia  %[regs], {r0-r15}^" in system mode causes unpredictable behaviors.
>>
>> Could anyone provide a solution to it?
>>
>> I think the arm context switching code should be reviewed carefully.
>>
>> Thany you!
>>
>>
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>