[Barrelfish-users] Uncacheable data read/write and instruction fetch for Barrelfish but not Linux.

Simon Peter speter at inf.ethz.ch
Tue May 21 20:24:52 CEST 2013


This might just have to do with processor configuration. Barrelfish does 
very little init, especially on application processors. On a real x86, 
the BIOS enables caching for us. It might be that your simulator BIOS 
does not do this.

Simon

On 13-05-21 05:30 AM, Mateusz Olczak wrote:
> Hello,
>
> I've been trying to study cache statistics for Barrelfish and Linux using Simics and g-cache.
>
> For simplicity, I've configured the cache structure to a private L1-cache for each core and one big shared L2-cache for all other cores.
> The L1-cache is split into one data- and one instruction-cache.
>
> When running Linux, all caches look fine and filled with data as you might expect.
> However when running Barrelfish I get uncacheable data-read and writes and uncacheable instruction fetches on all caches on all cores except first core.
>
> Simics data cache statistics for data cache core 1 and core 0.
>
> Data cache core 1:
>
> Cache statistics: dc1
> -----------------
>      Total number of transactions:    1641974407
>       Cacheable device data reads:             0
>      Cacheable device data writes:             0
> Uncacheable device data reads (DMA):             0
> Uncacheable device data writes (DMA):             0
>            Uncacheable data reads:    1090228857
>           Uncacheable data writes:     551745550
>   Uncacheable instruction fetches:             0
>            Data read transactions:             0
>                  Data read misses:             0
>    Instruction fetch transactions:             0
>          Instruction fetch misses:             0
>           Data write transactions:             0
>                 Data write misses:             0
>            Copy back transactions:             0
>
> Data cache core 0:
>
> Cache statistics: dc0
> -----------------
>      Total number of transactions:    2288115374
>       Cacheable device data reads:             0
>      Cacheable device data writes:             0
> Uncacheable device data reads (DMA):             0
> Uncacheable device data writes (DMA):             0
>            Uncacheable data reads:          8697
>           Uncacheable data writes:         10405
>   Uncacheable instruction fetches:             0
>            Data read transactions:    1487307166
>                  Data read misses:     118621753
>               Data read hit ratio:         92.02%
>    Instruction fetch transactions:             0
>          Instruction fetch misses:             0
>           Data write transactions:     800789106
>                 Data write misses:     309300632
>              Data write hit ratio:         61.38%
>            Copy back transactions:             0
>                 Lost Stall Cycles:   22284986990
>
> Does any one have a guess what might be the reason that Barrelfish gives me uncacheable data read/write and uncacheable instruction fetches on all other cores then the first one but Linux looks normal on all caches?
>
> // Mateusz
>
>
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