<div dir="ltr">Prof. Timothy, thanks for the answer.<br><br>>
I'm not sure what communication stack your graphs are using (whether<br>> this is bare-metal RCCE, RCCE over Linux TCP, etc.).<br>As I get it, the test was conducted on RCCE over Linux (this assumption demands a proof, though...).<br>
<br>>
On Barrelfish we require a trap to kernel mode for inter-core messages,<br>> which in practice dominates the time taken to access the MPB (once<br>> you're in the kernel, we can transfer a cache line to another core's<br>
> on-time MPB in a hundred clocks or so as Intel advertise).<br>Did you perform some measurement like RCCE PingPong to ascertain<br>the overhead of the kernel mode trap and the time of the actual cache line transfer<br>
to another core's on-time MPB?<br>According to the article from 1996 "A Performance Comparison of UNIX Operating Systems on the Pentium"<br>(<a href="http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.24.5759">http://citeseerx.ist.psu.edu/viewdoc/summary?doi=10.1.1.24.5759</a>) where Intel Pentium P54C-100MHz was<br>
used for the measurements, getpid() system calls costs ~2.5 microsecond.<br>Now, the default tile frequency on SCC is 533MHz (if Router frequency is 800MHz), but the order<br>of context switch / system call may still dominate the time taken to access the MPB...<br>
<br>Thanks, KostaZ.<br>
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