<div>Thanks!</div>
<div> </div>
<div>I commented out the line for watchall.sh in bootscc.sh and it ran successfully with the following output :</div>
<div> </div>
<div>/<a href="http://hg.barrelfish.org/tools/scc$">hg.barrelfish.org/tools/scc$</a> ./bootscc.sh</div>
<div><br>INFO: Welcome to sccReset 1.3.0 (build date Aug 25 2010 - 15:55:54)...<br>INFO: Applying global software reset to SCC (cores & CRB registers)...<br>Successfully created memory images...<br>Successfully created LUT configuration...<br>
INFO: Welcome to sccBoot 1.3.0 (build date Aug 25 2010 - 15:55:06)...<br>INFO: Pulling reset of all cores...<br>INFO: Preloading Memory with object file...<br>INFO: Found object for MC x=0, y=0: "obj/mch_0_0.32.obj"...<br>
INFO: writeMemFromOBJ(...): Configuration of memory done!<br>INFO: Successfully (re-)loaded object file "obj/mch_0_0.32.obj"...<br>INFO: Found object for MC x=5, y=0: "obj/mch_5_0.32.obj"...<br>INFO: writeMemFromOBJ(...): Configuration of memory done!<br>
INFO: Successfully (re-)loaded object file "obj/mch_5_0.32.obj"...<br>INFO: Found object for MC x=0, y=2: "obj/mch_0_2.32.obj"...<br>INFO: writeMemFromOBJ(...): Configuration of memory done!<br>INFO: Successfully (re-)loaded object file "obj/mch_0_2.32.obj"...<br>
INFO: Found object for MC x=5, y=2: "obj/mch_5_2.32.obj"...<br>INFO: writeMemFromOBJ(...): Configuration of memory done!<br>INFO: Successfully (re-)loaded object file "obj/mch_5_2.32.obj"...<br>INFO: Preloading LUTs...<br>
INFO: Configuring LUTs with content of file "obj/lut_init.dat"...<br>INFO: -> Configuration of LUTs done!<br>INFO: Image is now pre-loaded. Release resets to start individual cores...<br>INFO: Welcome to sccReset 1.3.0 (build date Aug 25 2010 - 15:55:54)...<br>
INFO: Resets have been released: 1 core (PID = 0x00)...<br></div>
<div>However it shows that only one core's reset is released and there is no message of other cores getting booted even though I made entries in</div>
<div>menu.scc.lst for five cores. Is this because of commenting out watchall.sh ?</div>
<div>Is there a way to verify now that the cores are actually running barrelfish ?</div>
<div> </div>
<div>Thanks</div>
<div>Vaibhav Jain<br></div>
<div class="gmail_quote">On Sat, Nov 19, 2011 at 2:38 AM, Simon Peter <span dir="ltr"><<a href="mailto:speter@inf.ethz.ch">speter@inf.ethz.ch</a>></span> wrote:<br>
<blockquote style="BORDER-LEFT: #ccc 1px solid; MARGIN: 0px 0px 0px 0.8ex; PADDING-LEFT: 1ex" class="gmail_quote">
<div class="im">
<blockquote style="BORDER-LEFT: #ccc 1px solid; MARGIN: 0px 0px 0px 0.8ex; PADDING-LEFT: 1ex" class="gmail_quote">I could find the scripts bootscc.sh and menu.lst.scc and made changes<br>for booting core 1-5 but there is another<br>
problem I am facing. The bootscc.sh calls another script watchall.sh<br>which is being blocked due to access permissions.<br>Could you please let me know if watchall.sh is necessary for the<br>installation ? Also I could see the first command in watchall.sh as<br>
"trap "pkill -P $$" SIGINT" whcih mught be getting blocked. Could you<br>please tell what is it supposed to do ?<br>I am just wondering if it can be made to execute without requiring root<br>privileges.<br>
</blockquote><br></div>watchall.sh forwards serial output from Barrelfish to your console. It is not required to boot the SCC and only provides a convenient way for output from Barrelfish, so you can leave it out.<br><br>
In order to make it work without root privileges, you probably have to give proper privileges to the SCC UART device files in /dev that watchall.sh is trying to access.<span class="HOEnZb"><font color="#888888"><br><br>Simon<br>
</font></span></blockquote></div><br>