Hi all,<div><br></div><div>I've successfully booted Barrelfish on Bochs PC emulator with 1, 2 and 4 cores SMP emulation. </div><div><br></div><div>I had to do a fix in the Barrelfish code, regarding the IOAPIC index register. According to the Intel datasheet, the IOAPIC ( <a href="http://www.intel.com/design/chipsets/datashts/290566.htm">http://www.intel.com/design/chipsets/datashts/290566.htm</a> ) index register has to be accessed only in 32-bit words (page 8). The Bochs code has an assert preventing 8-bit access to the register. So the line to be modified is in the file devices/lpc_ioapic.dev:</div>
<div><br></div><div>register ind rw addr(base, 0x0) "Index" type(uint32);</div><div><br></div><div>I send the patch. It seems to work in QEMU and in a real machine too.</div><div><br></div><div>Being able to run Barrelfish inside Bochs has several advantages. </div>
<div><br></div><div>1. Its execution is deterministic so if you find an error you can always reproduce it in each execution in the same way. QEMU is indeterministic. I was even discussing this in the QEMU mailing list and there is currently no solution to this problem.</div>
<div><br></div><div>2. It has an embedded debugger and you can do physical address debugging, the gdb stub in QEMU doesn't support.</div><div><br></div><div><br></div><div>Cheers,</div><div><br></div><div>-- <br>Zeus Gómez Marmolejo<br>
Barcelona Supercomputing Center<br>PhD student<br><a href="http://www.bsc.es" target="_blank">http://www.bsc.es</a><br><br><br>
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