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<p class="MsoPlainText">Simon,<o:p></o:p></p>
<p class="MsoPlainText"> Thanks. Yes I see what you are talking about. Looking at the boot log I also saw the following:<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText"><img width="684" height="281" id="Picture_x0020_3" src="cid:image001.jpg@01CF385A.E16C0A80" alt="CropperCapture[4].jpg"><o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">Given that the Linux OS I’m running on is also a VM and being that the timers are even further removed from the real hardware, this behavior would not be unusual. What I think I will try is setting up a single timer on core 0 which seems
to work fairly well and broadcast the timeout using messages to the other cores. The time I’m using is fairly coarse so message latencies should not matter.<o:p></o:p></p>
<p class="MsoPlainText">Thanks,<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">Mark Brown<o:p></o:p></p>
<p class="MsoPlainText">Huawei Technologies Inc.<o:p></o:p></p>
<p class="MsoPlainText">5340 Legacy Dr., Suite 175<o:p></o:p></p>
<p class="MsoPlainText">Plano, TX 75024<o:p></o:p></p>
<p class="MsoPlainText">Tel: 469-277-5700 x5870<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">-----Original Message-----<br>
From: Simon Gerber [mailto:simon.gerber@inf.ethz.ch] <br>
Sent: Wednesday, March 05, 2014 8:54 AM<br>
To: M Brown; Andrew Baumann; barrelfish-users@lists.inf.ethz.ch<br>
Cc: debashis bhattacharya<br>
Subject: Re: [Barrelfish-users] Deferred event problem...<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">Hi Mark,<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">I've run your sample code and get similar (but not repeatable, except for core 3 doing nothing at all) behaviour from QEMU.<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">I suspect the behaviour we're seeing here is caused by the fact that stock QEMU's full system emulation mode only uses one host thread which might lead to different virtual cores being scheduled in a irregular fashion and therefore skewing
their timers. In general, time-sensitive things don't work too well on QEMU judging from my experience.<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">The same code behaves as expected on one of our physical machines (i.e.
<o:p></o:p></p>
<p class="MsoPlainText">you get timer ticks every second on each core).<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">Best,<o:p></o:p></p>
<p class="MsoPlainText">-- Simon<o:p></o:p></p>
<p class="MsoPlainText"><o:p> </o:p></p>
<p class="MsoPlainText">On 04.03.2014 20:40, M Brown wrote:<o:p></o:p></p>
<p class="MsoPlainText">> Andrew,<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> I’m running Barrelfish under QEMU. I’m running the emulation with
<o:p></o:p></p>
<p class="MsoPlainText">> 4 cores. Enclosed is a simple timer setup in main that I’m loading and
<o:p></o:p></p>
<p class="MsoPlainText">> running on the four cores:<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> What I get on the output indicates cores 0 and 2 reporting the one
<o:p></o:p></p>
<p class="MsoPlainText">> second interval regularly. Core 1 chimes in now-and-then and nothing
<o:p></o:p></p>
<p class="MsoPlainText">> from core 3:<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Can you guys try this and see what you get?<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Thanks,<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Mark Brown<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Huawei Technologies Inc.<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> 5340 Legacy Dr., Suite 175<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Plano, TX 75024<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Tel: 469-277-5700 x5870<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Email: <a href="mailto:m.brown@huawei.com"><span style="color:windowtext;text-decoration:none">m.brown@huawei.com</span></a><o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> *From:*Andrew Baumann [<a href="mailto:Andrew.Baumann@microsoft.com"><span style="color:windowtext;text-decoration:none">mailto:Andrew.Baumann@microsoft.com</span></a>]<o:p></o:p></p>
<p class="MsoPlainText">> *Sent:* Friday, February 28, 2014 3:28 PM<o:p></o:p></p>
<p class="MsoPlainText">> *To:* M Brown; <a href="mailto:barrelfish-users@lists.inf.ethz.ch">
<span style="color:windowtext;text-decoration:none">barrelfish-users@lists.inf.ethz.ch</span></a><o:p></o:p></p>
<p class="MsoPlainText">> <<a href="mailto:barrelfish-users@lists.inf.ethz.ch"><span style="color:windowtext;text-decoration:none">mailto:barrelfish-users@lists.inf.ethz.ch</span></a>><o:p></o:p></p>
<p class="MsoPlainText">> *Cc:* debashis bhattacharya<o:p></o:p></p>
<p class="MsoPlainText">> *Subject:* RE: Deferred event problem...<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Hi Mark,<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> This is not a known problem (at least not to me; someone else on the
<o:p></o:p></p>
<p class="MsoPlainText">> list might know more). Deferred events run off the same per-core timer
<o:p></o:p></p>
<p class="MsoPlainText">> used by the kernel for scheduling – on x86, this is the local APIC
<o:p></o:p></p>
<p class="MsoPlainText">> timer. If they don’t work on other cores, then I would expect that a
<o:p></o:p></p>
<p class="MsoPlainText">> lot of scheduling code would also be broken. What platform are you
<o:p></o:p></p>
<p class="MsoPlainText">> running on? Does this reproduce on Qemu?<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Andrew<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> *From:* M Brown [<a href="mailto:M.Brown@huawei.com"><span style="color:windowtext;text-decoration:none">mailto:M.Brown@huawei.com</span></a>]<o:p></o:p></p>
<p class="MsoPlainText">> *Sent:* Thursday, 27 February 2014 18:15<o:p></o:p></p>
<p class="MsoPlainText">> *To:* <a href="mailto:barrelfish-users@lists.inf.ethz.ch">
<span style="color:windowtext;text-decoration:none">barrelfish-users@lists.inf.ethz.ch</span></a><o:p></o:p></p>
<p class="MsoPlainText">> <<a href="mailto:barrelfish-users@lists.inf.ethz.ch"><span style="color:windowtext;text-decoration:none">mailto:barrelfish-users@lists.inf.ethz.ch</span></a>><o:p></o:p></p>
<p class="MsoPlainText">> *Cc:* debashis bhattacharya<o:p></o:p></p>
<p class="MsoPlainText">> *Subject:* [Barrelfish-users] Deferred event problem...<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> All,<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> I’m running into a problem with the deferred event support. I’m
<o:p></o:p></p>
<p class="MsoPlainText">> running a system with 4 cores. When I attach a periodic deferred event<o:p></o:p></p>
<p class="MsoPlainText">> (timer) within core 0 all works well. When I attach one within core 3
<o:p></o:p></p>
<p class="MsoPlainText">> it does not fire at all. All deferred events are attached to their
<o:p></o:p></p>
<p class="MsoPlainText">> respective default waitsets and the “main”s running in each core are
<o:p></o:p></p>
<p class="MsoPlainText">> running an event loop on the core’s respective default waitset. Is
<o:p></o:p></p>
<p class="MsoPlainText">> there any known problem with this function?<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Thanks,<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Mark Brown<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Huawei Technologies Inc.<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> 5340 Legacy Dr., Suite 175<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Plano, TX 75024<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Tel: 469-277-5700 x5870<o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> Email: <a href="mailto:m.brown@huawei.com"><span style="color:windowtext;text-decoration:none">m.brown@huawei.com</span></a> <<a href="mailto:m.brown@huawei.com"><span style="color:windowtext;text-decoration:none">mailto:m.brown@huawei.com</span></a>><o:p></o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">><o:p> </o:p></p>
<p class="MsoPlainText">> _______________________________________________<o:p></o:p></p>
<p class="MsoPlainText">> Barrelfish-users mailing list<o:p></o:p></p>
<p class="MsoPlainText">> <a href="mailto:Barrelfish-users@lists.inf.ethz.ch"><span style="color:windowtext;text-decoration:none">Barrelfish-users@lists.inf.ethz.ch</span></a><o:p></o:p></p>
<p class="MsoPlainText">> <a href="https://lists.inf.ethz.ch/mailman/listinfo/barrelfish-users">
<span style="color:windowtext;text-decoration:none">https://lists.inf.ethz.ch/mailman/listinfo/barrelfish-users</span></a><o:p></o:p></p>
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