[Oberon] Oberon / Lola -> VHDL / Verilog Hardware Description Language
greim at schleibinger.com
Sat Dec 28 15:32:51 CET 2013
many thanks to your comments to my suggestions, regarding Oberon as HDI.
1* theoretical, you may write a compiler that is translation an Oberon
style HDL to the configuration file for any FPGA.
In practice this would need 1000 man-year i guess.
So some Oberon -> (VHDL or Verilog) compiler would by the only practical
way. Chisel as far as i remember has less the 10.000 lines of code.
2* many thanks for the hint to LOLA. As far as i could download the
whitepaper its in principle what i suggested.
Its designed in 1995 for standard GALs. Actual FPGAs are much more
complex. So a LOLA2 working as described in 1* would be one possible
solution i guess.
More information about the Oberon