[Oberon] FPGA Oberon again

[markus_greim]

Paul,


>
>> In the net on GitHub i found a quite new
>> ORP.Mod (which is including ORS, ORB, ORG as described in chapter 12.1,
>> Figure 12.1 on page 14 of the Oberon Report)
>> Is this the right tool for this job?
>
> I do not know of this, so I don't know, but I doubt it.
>

Its at:
https://github.com/ilovb/ProjectOberon2013

The project seems not be ready, or not completely published yet.
So i have to wait until ORL.Mod or a modified Modules.Mod or any other 
tool for generating the RISC5 startup code will be available, i guess.

Maybe for
the Oberon-7 compiler http://exaprog.com/eng/index.html
or the Oxford Oberon-2
http://spivey.oriel.ox.ac.uk/corner/Installing_OBC_release_2.9
or for Linux AOS, that would make things easier on the PC site.

Also a SD card image and a SD loader would be helpful.

I would be quite interested to have a system which has a high level 
language and user interface, which is open source and running on a 
hardware /processor which may be expanded (in a easy way ?).

My idea would be an expansion with A/D, D/A as hardware interface, and a 
atan2/Cordic machine in Verilog.

Markus