[Oberon] FPGA Oberon on projectoberon: Verilog instead of VHDL

[Frans-Pieter Vonck]

Hi Oberoneurs,

>VHL
sorry, should be VHDL.
Clearly did not know what the acronym meant.
I looked it up at Wikipedia :

On VHDL:
--------------
"VHDL,(VHSIC Hardware Description Language)."

"VHSIC (Very High Speed Integrated Circuit) was a 1980s U.S. government
program."

"VHDL borrows heavily from the Ada programming language in both concepts
and syntax."

On Verilog:
---------------
"The designers of Verilog wanted a language with syntax similar to the C
programming language [..]"

Anyone has an idea why Wirth choose Verilog instead of VHDL?

Greets,
F.P.



> Hi all,
>
> goggling for RISC5Top.v give for example this result:
>
> http://www.projectoberon.com/
>
> Paul Reed has published a new web site an 17.feb.2014!
> Very exciting...seems to be the latest source code including some
missing puzzle parts.
>
> Unfortunately NW didn't mentioned it on his birthday colloquium.
>
> On
> <http://www.srf.ch/wissen/digital/computer-pionier-niklaus-wirth-80-und-aktiv>
there is a short radio feature about Prof. Wirth, including some
pictures of his "Circuit Cellar"
>
> Markus Greim
>
>
>
>
>
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
https://lists.inf.ethz.ch/mailman/listinfo/oberon
>