[Oberon] FPGA Oberon some news and a reply to F.P.

[Jörg Straube]

FP
It is true that a Verolg definition of the processor gives a certain independance on the real HW being used, as long as there is a Verilog toolchain (not part of the project) for your real HW.
- As one example where small adaptions might be necessary while porting the project to other/newer HW is the clock. The project's Verilog code assumes a 25MHz clock, eg in the clock dividers you find here and there. In case the real HW does not provide that clock natively, you have to adapt the clock dividers in your Verilog code accordingly.
- Another small adaption might be the mapping of names and location of the pins, now present in the "ucf" file

br, Jörg

Am 04.03.2014 um 13:00 schrieb Frans-Pieter Vonck <fp at vonck.nl>:

>> So, I think, if FPGAOberon is
>> generic and not much dependent on specialties of Spartan 3, we should
>> immediately make/port our FPGAOberon on/to a latest board.
> 
> I thought that hardware independence was the whole idea of Wirth behind
> using an hdl as the basis for FPGAOberon (compiler
> , system).
> To me it seems an an attractive idea.
> For instance, the oberon compiler for the lpc2000 processors is no longer
> supported. (I just threw my three embedded artists boards in the garbage
> bin.)
> 
> My understanding is that  if someone writes a driver, for instance an
> rs232 , in an hdl language, the driver is portable to every fpga
> processor.
> 
> But I could be wrong.
> 
> Greets,
> F.P.
> 
> 
> 
> 
> 
> 
> 
> 
> 
>> Dear All,
>> 
>> 
>>> With the risk that an FPGA board maker halts production of the one
>> board
>>> that the project is based on.
>> 
>> I feel sad that Spartan 3 is becoming obsolete. So, I think, if FPGAOberon
>> is
>> generic and not much dependent on specialties of Spartan 3, we should
>> immediately make/port our FPGAOberon on/to a latest board.
>> 
>> 
>> With thanks and best regards,
>> 
>> Yours sincerely,
>> Srinivas Nayak
>> 
>> Home: http://www.mathmeth.com/sn/
>> Blog: http://srinivas-nayak.blogspot.in/
>> 
>>> On 03/04/2014 03:04 PM, Jan Verhoeven wrote:
>>> That's why I am still in doubt: why shell out an extra 200 eucks on FPGA
>>> gear, no matter how useful it may be for my education and ego? With the
>>> risk that an FPGA board maker halts production of the one board that the
>>> project is based on.
>> 
>> --
>> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
>> https://lists.inf.ethz.ch/mailman/listinfo/oberon
> 
> 
> 
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon
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