[Oberon] RISC5

[Paul Onyschuk]

On Tue, 15 Apr 2014 14:32:24 +0100
Paul Reed <paulreed at paddedcell.com> wrote:

> Statements like these on the list (and you're by no means the only
> one!) are not very helpful for people trying patiently/valiantly! to
> learn about Oberon.  Let's move on.
>
> > Depends on the definition of "emulated" vs "implemented" :-)
> >
> > Couldn't you do the following analogy?
> >  Verliog code  = PdWs emulator code
> >  Verilog tools = C compiler
> >  Spartan 3     = host environment
>

I don't want to anger anyone, but in my opinion it is
oversimplification in both cases.

What is important.  Verilog sources are description of logical design
of hardware.  You can map this logical design onto FPGA.  Moreover
circuits build out of transistors are designed the same way, using same
logic.  No one is drawing circuits anymore (maybe beside asynchronous
chips, but that is very different world).  Modern CPU has few thousand
millions of transistors - you can't see it with your eyes.  Modern
hardware is described in software, since it is much more expressive.

In that view RISC5 is logical description of real hardware and that
matters.  You can use it to assemble circuits of transistors, just it
isn't financially viable - with FPGA costing a hundred dollars is it
hardly a choice. 

I'll point out lecture by Prof. Gerard Berry called "Circuits and
Systems on Chips", which was recorded and it is available to public
[1].  Especially last 13 minutes are worth seeing, since they are
describing how modern hardware is designed.  Other parts are explaining
why Boolean logic can be used for designing circuits, how simple
concepts like pipeline work, he touches upon more complex things like
caches and metastability.  Other lectures are worth seeing also.

[1] http://idea.ed.ac.uk/future/#programme

-- 
Paul Onyschuk