[Oberon] Spartan 6 Kickstarter project

[Walter Gallegos]

hi Davide,

Translate Project Oberon from XC3 to XC6 is simple task for who have some FPGA skills, the problem with this board and others is the memory type. The original Oberon project are using a static RAM with a memory management simpler.

To implement the project Oberon with SDRAM you need add hardware for memory management;  this task have some side effects not simple to handle without performance penalty.

In practice, for my embedded controllers this additional complexity is not justified.

Regards,
Walter


From: Davide Della Casa 
Sent: Monday, May 04, 2015 3:45 PM
To: oberon at lists.inf.ethz.ch 
Subject: Re: [Oberon] Spartan 6 Kickstarter project

The Kikstarter project https://www.kickstarter.com/projects/1812459948/minispartan6-a-powerful-fpga-board-and-easy-to-use mentioned before in this thread has now graduated to the actual product http://www.scarabhardware.com/getting-started/

"For memory, you will have 32MB of 166MHz SDRAM” (16M x 16 bit Synchronous DRAM ) via a as4c16m16s ( https://www.google.co.uk/search?q=as4c16m16s&oq=as4c16m16s&aqs=chrome..69i57j0l5.11094j0j7&sourceid=chrome&es_sm=91&ie=UTF-8 )

(Key specs: Clock Cycle time (min.) 6/7 ns tAC3 Access time from CLK (max.) 5.4/5.4 ns tRAS Row Active time (min.) 42/49 ns tRC Row Cycle time (min.) 60/63 ns)

The previous discussion thread on this board shifted focus to another board - so I’m left with the curiosity - does anyone reckon this is/isn’t a viable board to run oberon on?

Cheers!

Davide Della Casa



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