[Oberon] FPGA - Bit reversal

[Alexander Ilin]

Hello, Tomas!

21.09.2017, 22:33, "Tomas Kral" <thomas.kral at email.cz>:
> I have been toying with bit reversals for byte and word types. Simple
> forms consist of plain shifting in sets of bits.
>
>   PROCEDURE ReverseByte(wd: INTEGER): INTEGER;
>     VAR i: INTEGER; rbt, t, u: SET;
>   BEGIN
>     u := SYSTEM.VAL(SET, wd);
>     rbt := {}; FOR i := 0 TO 7 DO
>       t := ASR(u, i)*{0}; t := LSL(t, 7-i);
>       rbt := rbt+t;
>     END
>   RETURN SYSTEM.VAL(INTEGER, rbt) END ReverseByte;

Let me rewrite the FOR loop contents for you:

  PROCEDURE ReverseByte(wd: INTEGER): INTEGER;
    VAR i: INTEGER; rbt, u: SET;
  BEGIN
    u := SYSTEM.VAL(SET, wd);
    rbt := {}; FOR i := 0 TO 7 DO
      IF i IN u THEN INCL(rbt, 7-i) END
    END
  RETURN SYSTEM.VAL(INTEGER, rbt) END ReverseByte;

  The solution with the array lookup looks reasonable if you have the memory. Don't forget to swap the byte halves as well : )

---=====--- 
 Александр