[Oberon] FPGA - Boot over serial line

[Tomas Kral]

On Thu, 12 Oct 2017 17:42:34 +0200
Tomas Kral <thomas.kral at email.cz> wrote:

> But what is ORG.Decode?

Hi, 
Oberon-0 compiler now compiles on RPI at ARM host and FPGA.

`Decode' dimistified, is a disassembly command provided by Oberon-0
compiler.

QUESTION, how can I use PUT, GET in Oberon-0 compiler? 

OSP.Compile @ (* errors on IMPORTS SYSTEM; *)

MODULE TestLEDs;
IMPORT SYSTEM;

CONST
  ledAdr = -60;

VAR
  x, y, z: INTEGER;

BEGIN z := 0;
  REPEAT
    SYSTEM.PUT(ledAdr, z); x := 1000;
    REPEAT y := 1000;
      REPEAT y := y-1 UNTIL y = 0;
      x := x-1
    UNTIL x = 0;
    z := z+1
  UNTIL FALSE
END TestLEDs.


OSG.Decode (* produces below disassembly *)

4EE90004 AFE00000
   0 4EE90004	SUB SP SP       4
   1 AFE00000	STW  LNK SP       0
   2 40000000	MOV R0 R0       0
   3 8D000003	LDW SB R0       3
   4 A0D00008	STW  R0 SB       8
   5 400003E8	MOV R0 R0    1000
   6 A0D00000	STW  R0 SB       0
   7 400003E8	MOV R0 R0    1000
   8 A0D00004	STW  R0 SB       4
   9 80D00004	LDW R0 SB       4
  10 40090001	SUB R0 R0       1
  11 A0D00004	STW  R0 SB       4
  12 80D00004	LDW R0 SB       4
  13 40090000	SUB R0 R0       0
  14 E9FFFFFA	BNE       -6
  15 80D00000	LDW R0 SB       0
  16 40090001	SUB R0 R0       1
  17 A0D00000	STW  R0 SB       0
  18 80D00000	LDW R0 SB       0
  19 40090000	SUB R0 R0       0
  20 E9FFFFF2	BNE      -14
  21 80D00008	LDW R0 SB       8
  22 40080001	ADD R0 R0       1
  23 A0D00008	STW  R0 SB       8
  24 E7FFFFEC	B     -20


-- 
Tomas Kral <thomas.kral at email.cz>