# [Oberon] Bug in multiplier?

Jörg joerg.straube at iaeth.ch
Wed Mar 7 07:41:06 CET 2018

```Hellwig

Indeed, for signed integers Multiplier.v works correctly.
For unsigned the code is wrong.
Perhaps there are more elegant solutions but a quick fix would be as follows.

Change this line
assign w1 = (S == 32) & u ? {P[63], P[63:32]} - {w0[31], w0} :
{P[63], P[63:32]} + {w0[31], w0};
to this
assign w1 = (S == 32) & u ? {P[63], P[63:32]} - {w0[31], w0} :
u ? {P[63], P[63:32]} + {w0[31], w0} : {1’b0, P[63:32]} + {1b'0, w0};

Jörg

> Am 04.03.2018 um 10:13 schrieb Hellwig Geisse <hellwig.geisse at mni.thm.de>:
>
> Hi all,
>
> I'm trying to understand the RISC5 implementation and
> stumbled over a corner case in unsigned multiplication.
> What exactly is "Multiplier.v" supposed to compute in
> case u=1 in the instruction (i.e., u=0 in Multiplier.v,
> because of ".u(~u)" in the instantiation of the module)?
>
> In NW's "The Design of a RISC Architecture and its
> implementation with an FPGA" (revision 1.9.2015) I read
> "..., and the MUL instruction with u set to 1 considers
> the operands as unsigned numbers, yielding a 64-bit
> unsigned product". So (1 << 31)*(1 << 31) should give
> a result of (1 << 62). But when I feed the multiplier's
> x and y inputs both with 0x80000000, the result is
> 0xC000000000000000 instead of 0x4000000000000000, at
> least in my simulation of the module.
>
> Am I missing something?
>
> Hellwig
> --
> Oberon at lists.inf.ethz.ch mailing list for ETH Oberon and related systems
> https://lists.inf.ethz.ch/mailman/listinfo/oberon

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