[Oberon] FPGA - nRF24L01 `RPI Net' server

[Paul Reed]

Hi Tomas,

> Looking into `PI' low level `SPI' code, chip is controlled by `CE' and
> `CSN' pins. Reading `SCC.Mod' and `SPI.v' code I do not see these
> signals used, possible?

Not possible - the radio in the chip does not listen/transmit when CE is
not used, and doesn't receive commands if CSN is not used.

But because of possible confusion between CE (radio enable) and CSN (SPI
slave select) I called the former NEN (network enable) and the latter SS
in hardware.

They are SPI control register bits 3 and 1 respectively; see SCC.Mod, bits
netEnable and netSelect, respectively. netSelect is inverted by the
hardware, so writing a 1 to the control port activates the signal (sends
it low) - this does not apply to netEnable.

By the way, notice from the datasheet that you can't write to the nRF
registers when the radio is on.

HTH
Paul