[Oberon] FPGA - nRF24L01 `RPI Net' server

[Tomas Kral]

On Wed, 16 May 2018 18:02:17 +0100
Paul Reed <paulreed at paddedcell.com> wrote:

> But the ACK is received when PRIM_RX=0, ie when the chip is nominally
> a transmitter.  I know it technically has to be a receiver to receive
> the ACK, but if you send multiple packets PRIM_RX stays at 0, right?

Thank you.
I already replied, but seems to have lost entransit.
Reading Ch.6,t as suggested, beginning to have some understanding.

Yes, ACK is received by the transmitter end (RPI), as both nodes
temporarily swap their TX/RX modes, and ACK is send/received in a
defined time window, if not lost already, and is received outside
FIFO, correct? 

-- 
Tomas Kral <thomas.kral at email.cz>