[Oberon] FPGA - nRF24L01 `RPI Net' server

[Paul Reed]

Hi Tomas,

>> See detailed description in 7.8.7
> Actually, did you mean 7.7. figure 16?

7.8.7 shows the particular example of MAX_RT reached.  But, yes, you have
to know 7.7 fig. 16 as well, because that shows the minimum 10uS pulse on
CE, which is assumed and omitted for brevity in later diagrams.

HTH
Paul