[Oberon] FPGA - nRF24L01 `RPI Net' server

[Jörg]

Tomas

head1.typ is very important as it steers/controls the whole state machine of Net.Mod.

1) How do you get to reply(5) in ReceiveFiles?
2) What is the value of head1.typ in case SCC does not receive anything?

Jörg

> Am 23.05.2018 um 22:15 schrieb Tomas Kral <thomas.kral at email.cz>:
> 
> On Wed, 23 May 2018 19:51:03 +0200
> Jörg <joerg.straube at iaeth.ch> wrote:
> 
>> How would the code following the ReceiveHead() detect whether a
>> timeout occurred?
> Add 1)
> `head.typ = 0FFH' is not checked in the code after ReceiveHead(), I do
> not see the point yet
> 
>> What does
>> SCC.ReceiveHead(head1) do?
> 
> Add 2).
> SCC.ReceiveHead(head1) does clear the receiver ResetRcv(), but it must
> first see the data in FIFO.
> 
> Oberon Transmit Log:
> ===================
> 
> typ len sadr dadr
> 
> Net.Gettime RPI ~
> 
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  53   0 180  94
>  71   4 180  94 valid
> time set
> 
> Net.ReceiveFiles RPI  Test.Mod ~  file size 640
> 
> Test.Mod receiving  
>  71   4 180  94
>  71   4 180  94
>  71   4 180  94
>  71   4 180  94
>  71   4 180  94
>  71   4 180  94
>   0 512 180  94 valid seqno 0
>   1 128 180  94 valid seqno 1
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94
> ... many iterations follow until timeout, no other seqno sent
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94
>   1 128 180  94  <= timeout sets head0.typ := 255
>    640
> 
> Net.Gettime RPI ~
> 
> 255 128 180  94 <= first pass through the loop
> 
> RX-FIFO has data though
> 00000040 RX_DR data ready
> 00000010 RX_FIFO not empty
> 
> 
> -- 
> Tomas Kral <thomas.kral at email.cz>
> --
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