[Oberon] FPGA - Display.Mod 4-bit colour
Tomas Kral
thomas.kral at email.cz
Tue Oct 16 01:26:45 CEST 2018
On Tue, 2 Oct 2018 11:40:22 +0200
Tomas Kral <thomas.kral at email.cz> wrote:
> IF SW[6] THEN dpt := 4 (*4 bit*)
> ELSE dpt := 1 (*1 bit*) END
Hi,
I am experimenting with 1-bit/4-bit colour map switch. It does things,
display is alright. But colours are mapped as thus, the names are not
exact but they appear to me like that.
map entry colour
00000000 black
00000080 red
00008000 green
00008080 yellow
00800000 cyan
00800080 violet
00808000 light cyan
00808080 light violet
00C0C0C0 light light violet
000000FF light red
0000FF00 light yellow
0000FFFF orange
00FF0000 dark red
00FF00FF yet another shade of violet
00FFFF00 turquoise
00FFFFFF white
The good point is, I can now set mono display with two colours other
than black/white, e.g. green/black or yellow/black, etc.
While I would expect the colours be more or similar like this.
map entry colour
00000000 black
00000080 blue
00008000 green
00008080 cyan
00800000 red
00800080 violet
00808000 yellow
00808080 grey
00C0C0C0 light grey
000000FF light blue
0000FF00 light green
0000FFFF light cyan
00FF0000 light red
00FF00FF light violet
00FFFF00 light yellow
00FFFFFF white
The colours are added by these lines in verilog for both 1-bit/4-bit.
assign vidm = (pixbuf[0] ^ inv); // mono
assign vidc = pixbuf[3:0] ^ {inv, inv, inv, inv}; // 4-bit
...
// RGB[7:0] = RRR GGG BB
assign RGB = {color[23:21], color[15:13], color[7:6]};
...
if (cmode) vid <= vidc else vid <= {3'b000, vidm};
...
and looked up in the map
...
if (~hblank & ~vblank)
case (vid)
4'h0: color <= col0;
...
4'hf: color <= col15;
endcase
else
color <= 24'h000000;
...
Noticeably, Display does not seem to have the same intensity down
across, at the the 1/3 upper top appears slightly darker.
I am becoming quite confused, I would be grateful for any hints.
Many thanks in advance.
--
Tomas Kral <thomas.kral at email.cz>
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