[Oberon] FPGA - Oberon-7 - Loops

[Tomas Kral]

Hi,

I am trying to optimise some code. I realise, the usual suspect for
slow performance may be hidden somewhere inside inner loops.

FOR a := 0 TO <expression> DO END;
a := 0; WHILE a <= <expression> DO INC(a) END;
a := 0; REPEAT INC(a) UNTIL a > <expression>;

Expression is constant to the loop, how does compiler handle it? 
When does it pay to compute expression outside the loop?

-- 
Tomas Kral <thomas.kral at email.cz>