[Oberon] BRAM
Walter Gallegos
walter at waltergallegos.com
Sun Feb 10 12:56:29 CET 2019
Additional point,
BRAMs in Xilinx are more than a simple RAM but true dual port RAMs. That
meas, the silicon provide two ports with simultaneous read/write access
to same physical memory; so, you can read/write an address while
read/write another address.
Also, ports could have different widths, can be writing in 8 bits while
reading in 32 bits from the other port, your have a FIFO with 8 bit
input 32 bits output for free.
For RiscCore I adopt the same solution as Microblaze, one BRAM port for
data and the other for code; so, code and data coexist into same
physical memory without need big multiplexers, and a peripheral have a 8
bit digital video input but reading as 24+8 bits (RGB+mask) from
processor side.
A powerfully block, as an old Xilinx paper say about BRAM : "be creative".
Walter
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