[Oberon] Risc-5 Instructions statistics

[Walter Gallegos]

Hi Wojtek,

I try to post on Oberon list, no success after many days...

Yes for me the focus is the special hardware not the micro-controller. 
In FPGA arena this must be the focus, let me try to explain for what I 
insist at point.

Industry rules have well know constraints.

To use a 28 USD chip I need justify that this chip provide the best 
solution. A basic rule in industry is : a project use FPGA because is 
the only practical solution if not use a micro-controller.

In this context, chose a bigger component adding 6.44 USD (+23%) to the 
costs when an ARM cost around 3.5 USD could be hard to justify. Beside 
the cost of a chip is the development cost that in case of ARM is 
significantly lower because it is a better know component than an FPGA.

Combined this cost with Paul numbers I could conclude that in the case 
of DSP blocks for multiplication adding 23% to the cost of each unit 
optimize only 0.16% of the software. A questionable conclusion, I agree, 
but illustrate the type of analysis that we need do.

Can be argument that for cases where multiplication is lot much used the 
software be optimized lot more, but the bottle neck, again based in Paul 
number, are load and store operations. If a project have lot of math 
build a dedicated processor ( a fixed state machine ) in hardware. I use 
this approach all times for DSP as image processing, filtering, 
convolutions, interpolation, etc.

This is the mind switch that many software designers need be to do for 
work with FPGA. If not they are using a costly all terrain truck as a 
compact car.

I insist because I would like to see a growing community but for that it 
has to fit into the industry and play by it rules.

Feel free to post this in Oberon list.
Regards,

Walter