[Oberon] LolaCreator: a Lola-2 IDE based on Qt Creator

[rochus.keller at bluewin.ch]

@ Paul Reed

Thanks for your feedback. 

>You could also consider outputting BLIF (the input to arachne-pnr) 
>and/or JSON (the input to nextpnr) and sidestep yosys completely, 
>simplifying the toolchain.

I would not recommend to sidestep the synthesis tool. The question would then be: who would do the logic minimizations/optimizations and the technology mapping? These things would then have to be implemented in the Lola compiler. Refering to the argument of Wojciech Skulski Lola-2 has behavioral/algorithmic constructs (a decent and presumably sufficient subset of Verilog), and I'm not even sure whether it would be possible to specify a design with Lola-2 only on gate or structural level. The Verilog the Lola-2 compiler generates is still on behavioural level, not just a minimized RTL netlist using the cell types of the target architecture. If we wanted to produce such output, we would have to implement most features of Yosys in the Lola compiler.

Best
R.