[Oberon] LolaCreator: a Lola-2 IDE based on Qt Creator

Walter Gallegos walter at waltergallegos.com
Fri Mar 22 12:24:51 CET 2019


I take contact with Lola many years ago, I'm productive in VHDL so read 
about a new description language is mere curiosity.

This curiosity leads me to ask why, as Lola is a vendor independent 
tool, do not export EDIF ?

EDIF is well supported for vendors tools making easy include Lola blocks 
into another design entry flows.

Walter


El 22/3/19 a las 07:49, rochus.keller at bluewin.ch escribió:
> @ Paul Reed
>
> Thanks for your feedback.
>
>> You could also consider outputting BLIF (the input to arachne-pnr)
>> and/or JSON (the input to nextpnr) and sidestep yosys completely,
>> simplifying the toolchain.
> I would not recommend to sidestep the synthesis tool. The question would then be: who would do the logic minimizations/optimizations and the technology mapping? These things would then have to be implemented in the Lola compiler. Refering to the argument of Wojciech Skulski Lola-2 has behavioral/algorithmic constructs (a decent and presumably sufficient subset of Verilog), and I'm not even sure whether it would be possible to specify a design with Lola-2 only on gate or structural level. The Verilog the Lola-2 compiler generates is still on behavioural level, not just a minimized RTL netlist using the cell types of the target architecture. If we wanted to produce such output, we would have to implement most features of Yosys in the Lola compiler.
>
> Best
> R.
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>
-- 
Walter Daniel Gallegos
Programmable Logic
Consultorí­a, Diseño, Entrenamiento.
walter at waltergallegos.com | www.waltergallegos.com
Tel +598 26 23 44 60 | Cel +598 99 18 58 88
Montevideo, Uruguay

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